| Basic diode/triode switching characteristic, clipper and clamper |
| • Gate circuit logic function and test experiment of TTL and COMS series |
| – AND/OR/NOT/NAND/NOR/XOR |
| • Combinational logic circuit experiment |
| – NAND gate designed voting circuit |
| – NAND gate, XOR gate, AND gate formed half adder circuit |
| – Data selector (select 1 from 4) formed half adder or half subtracter |
| – Two data selectors (select 1 from 4) formed half adder or half subtracter |
| – Logical operation |
| • Trigger experiment (R-S, D, JK) |
| • Integrated counter and register experiment |
| • Decoder and data selector experiment |
| • Monostable trigger and Schmitt trigger |
| • Self-excited multivibrator |
| • NE555, NE556 time base circuit experiment |
| • D/A, A/D conversion circuit |
| • Electronic stopwatch |
| • Competition responder |
| • Tug of war game machine |
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